![]() ![]() Includes all the standard features of a modern SystemVerilog simulator including debug, APIs, language and testbench support. SystemVerilog simulator used on the Metrics cloud platform. ISE Simulator (ISim) provides support for mixed-mode language simulation including, but not limited to, simulation of designs targeted for Xilinx's FPGAs and CPLDs. ![]() Xilinx's simulator comes bundled with the ISE Design Suite. It also provides support for the e verification language, and a fast SystemC simulation kernel. The modern version of the NCsim family, called Incisive Enterprise Simulator, includes Verilog, VHDL, and SystemVerilog support. In response to competition from faster simulators, Cadence developed its own compiled-language simulator, NC-Verilog. CVC has the ability to simulate in either interpreted or compiled mode. Aeolus-DS supports pure Verilog simulation.ĬVC is a Verilog HDL compiled simulator. Has the most feature complete VHDL-2008 implementation and the first to offer VHDL-2019 features.Īeolus-DS is a part of Aeolus simulator which is designed to simulate mixed signal circuit. With advanced debugging capabilities, it is aimed at the verification of large FPGA and ASIC devices using advanced verification methodologies such as assertion based verification and UVM. While ActiveHDL is a low-cost product, Aldec also offers a more expensive, higher-performance simulator called "Riviera-PRO". Aldec licenses Active-HDL to Lattice Semiconductor, an FPGA vendor, and the underlying engine can be found in Lattice's design suites. Wa_cq_url: "/content/www/us/en/docs/programmable/683870/21-3/fpga-simulation-basics.Proprietary simulators List of HDL simulators in alphabetical order by name Wa_audience: "emtaudience:business/btssbusinesstechnologysolutionspecialist/developer/fpgaengineer", Wa_primarycontenttagging: "primarycontenttagging:intelfpgas/intelprogrammabledevices/intelagilexfpgasandsocfpgas", Wa_emtcontenttype: "emtcontenttype:designanddevelopmentreference/developerguide/developeruserguide", ![]()
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